FIG. 1 illustrates a method of bonding a first semiconductor structure 101 to a second semiconductor structure 103. The first semiconductor structure 101 comprises through silicon vias 105 that extend from one surface of the first semiconductor structure 101 to the other surface of the first semiconductor structure 101. The second semiconductor structure 103 comprises contact bumps 107 over a under bump metallization (UBM) 109, which provide the electrical contact between the through silicon vias 105 on the first semiconductor structure 101 and the second semiconductor structure 103.
During the bonding process, a no-flow underfill (NFU) 111 is typically placed on the first semiconductor structure 101. Once the NFU 111 is in place, the first semiconductor structure 101 and the second semiconductor structure 103 are brought into contact with the through silicon vias 105 aligned with a corresponding contact bump 107 to establish electrical contact between the first semiconductor structure 101 and the second semiconductor structure 103. After the structures have been aligned and are in contact, a reflow is typically performed to reflow the contact bumps 107 and form a better contact with the through silicon vias 105.
However, if a NFU 111 is used, the surface of the first semiconductor structure 101 may be exposed adjacent to the through silicon vias 105. When this occurs, the material of the contact bump 107 (e.g., solder) may flow into the opening during reflow and establish a short circuit path between the contact bump 107 and the surface of the first semiconductor structure 101 as indicated by reference numeral 113. This can cause defects in the first semiconductor structure 101 and the second semiconductor structure 103, or even total device failure.
Accordingly, what is needed is a method to protect the surface of semiconductor structures from voids that might result in short circuits.